AS4C16M16S dram equivalent, 16m x 16 bit synchronous dram.
Fast access time from clock: 5.4/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation Internal pipelined architecture 4M word x 16-bit x 4-bank Programmable Mo.
requiring high memory bandwidth and particularly well suited to high performance PC applications.
Table 1. Key Specific.
Confidential 3 Rev. 3 Feb. /2014
Row Decoder
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AS4C16M16S
Table 3. Pin Details
Symbol CLK Type Input Description Clock: CLK is driven by the system clock. All SDRAM input signals are sampled on the positive edge of CLK. CLK also increments the in.
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